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Espressif Systems /ESP32-P4 /HP_SYS /PSRAM_FLASH_ADDR_INTERCHANGE

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Interpret as PSRAM_FLASH_ADDR_INTERCHANGE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CPU)CPU 0 (DMA)DMA

Description

need_des

Fields

CPU

Set 1 to enable addr interchange between psram and flash in axi matrix when hp cpu access through cache
DMA

Set 1 to enable addr interchange between psram and flash in axi matrix when dma device access, lp core access and hp core access through ahb

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Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data